Skip to content

@OpenXiangShan XiangShan

Change the repository type filter

All

    Repositories list

    85 repositories

    • GEM5

      Public
      C++
      •
      BSD 3-Clause "New" or "Revised" License
      •57•120•22•48•Updated Dec 27, 2025Dec 27, 2025

    • gsim

      Public
      C++
      •7•64•0•6•Updated Dec 27, 2025Dec 27, 2025

    • XiangShan

      Public
      Open-source high-performance RISC-V processor
      chiselrisc-vmicroarchitecture
      Scala
      •
      Mulan Permissive Software License, Version 2
      •854•6.8k•23•104•Updated Dec 27, 2025Dec 27, 2025

    • XiangShan-Design-Doc

      Public
      Documentation for XiangShan Design
      Markdown
      •
      Creative Commons Attribution 4.0 International
      •15•37•13•9•Updated Dec 26, 2025Dec 26, 2025

    • Utility

      Public
      Scala
      •24•15•0•5•Updated Dec 26, 2025Dec 26, 2025

    • difftest

      Public
      Modern co-simulation framework for RISC-V CPUs
      C++
      •
      Mulan Permissive Software License, Version 2
      •91•166•7•8•Updated Dec 26, 2025Dec 26, 2025

    • rocket-chip

      Public
      Rocket Chip Generator
      Scala
      •
      Other
      •1.2k•7•0•4•Updated Dec 26, 2025Dec 26, 2025

    • NEMU

      Public
      Super fast RISC-V ISA emulator for XiangShan processor
      risc-vrisc-v-emulator
      C
      •
      Other
      •119•303•21•13•Updated Dec 26, 2025Dec 26, 2025

    • ready-to-run

      Public
      Shell
      •13•9•3•2•Updated Dec 26, 2025Dec 26, 2025

    • CoupledL2

      Public
      Open-source non-blocking L2 cache
      Scala
      •
      Other
      •32•51•0•14•Updated Dec 26, 2025Dec 26, 2025

    • llvm-project

      Public
      The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
      LLVM
      •
      Other
      •16k•0•0•0•Updated Dec 25, 2025Dec 25, 2025

    • YunSuan

      Public
      This repo includes XiangShan's function units
      Scala
      •
      Mulan Permissive Software License, Version 2
      •15•28•0•1•Updated Dec 25, 2025Dec 25, 2025

    • XSAI

      Public
      A fork of Xiangshan for AI
      Scala
      •
      Mulan Permissive Software License, Version 2
      •854•35•6•0•Updated Dec 25, 2025Dec 25, 2025

    • env-scripts

      Public
      Scripts for XiangShan
      Tcl
      •21•17•0•2•Updated Dec 24, 2025Dec 24, 2025

    • XiangShan-doc

      Public
      Documentation for XiangShan
      Markdown
      •
      Creative Commons Attribution 4.0 International
      •149•429•7•6•Updated Dec 24, 2025Dec 24, 2025

    • HBL2

      Public
      Open-source non-blocking L2 cache, used in XS-AI system
      Scala
      •
      Other
      •32•2•0•0•Updated Dec 24, 2025Dec 24, 2025

    • tl-test-new

      Public
      The Unified TileLink Memory Subsystem Tester for XiangShan
      C++
      •
      Mulan Permissive Software License, Version 2
      •1•12•0•2•Updated Dec 24, 2025Dec 24, 2025

    • nexus-am

      Public
      C
      •46•42•8•7•Updated Dec 19, 2025Dec 19, 2025

    • XiangShan-User-Guide

      Public
      The User Guide of XiangShan.
      Markdown
      •
      Creative Commons Attribution 4.0 International
      •8•15•3•3•Updated Dec 18, 2025Dec 18, 2025

    • xs-env

      Public
      XiangShan Frontend Develop Environment
      Shell
      •
      Other
      •64•68•3•1•Updated Dec 17, 2025Dec 17, 2025

    • OpenLLC

      Public
      Scala
      •
      Other
      •12•12•0•4•Updated Dec 16, 2025Dec 16, 2025

    • riscv-isa-sim

      Public
      Spike, a RISC-V ISA Simulator
      C
      •
      Other
      •1k•10•0•2•Updated Dec 16, 2025Dec 16, 2025

    • ChiselIOPMP

      Public
      An open-sourced Chisel implementation of the RISC-V I/O Physical Memory Protection (IOPMP).
      Scala
      •
      Mulan Permissive Software License, Version 2
      •0•1•0•0•Updated Dec 11, 2025Dec 11, 2025

    • ChiselAIA

      Public
      RISC-V AIA in Chisel
      chiselriscvinterruptaia
      Scala
      •
      Mulan Permissive Software License, Version 2
      •3•8•11•2•Updated Dec 11, 2025Dec 11, 2025

    • nemu_board

      Public
      Python
      •1•1•0•0•Updated Dec 10, 2025Dec 10, 2025

    • riscv-rootfs

      Public
      C
      •17•4•0•5•Updated Dec 4, 2025Dec 4, 2025

    • HuanCun

      Public
      Open-source high-performance non-blocking cache
      Scala
      •
      Other
      •41•92•2•1•Updated Dec 3, 2025Dec 3, 2025

    • workload-builder

      Public
      CI for the workloads of Xiangshan NEMU.
      Shell
      •0•2•0•0•Updated Dec 1, 2025Dec 1, 2025

    • litmus-tests-riscv

      Public
      RISC-V architecture concurrency model litmus tests
      Assembly
      •
      Other
      •29•0•0•0•Updated Nov 29, 2025Nov 29, 2025

    • circt

      Public
      Circuit IR Compilers and Tools
      C++
      •
      Other
      •403•0•0•0•Updated Nov 29, 2025Nov 29, 2025