Merge accidental master PRs into maintenance-9.x

[sensei-hacker]

PR Type

Enhancement, New Target

---

Description

• Add new FrSky/Rotorflight VANTAC RF007 flight controller target

  • Includes timer hardware configuration for 9 motor outputs
  • Configures ICM42688P IMU, SPL06 barometer, and integrated FrSky FBUS receiver
  • Sets up I2C2 and UART3 with resource conflict resolution
  • Enables DSHOT_DMAR support with optimized timer setup

• Add maintenance-9.x branch to nightly build workflow

  • Enables automatic pre-release builds for RC releases

• Add M25P16 flash support to RADIOLINKF722 target

  • Provides alternative flash memory option alongside W25N01G

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Diagram Walkthrough

flowchart LR
  A["New VANTAC_RF007<br/>Target"] --> B["Timer Hardware<br/>9 Motor Outputs"]
  A --> C["IMU & Sensors<br/>ICM42688P, SPL06"]
  A --> D["FrSky FBUS<br/>Receiver UART5"]
  A --> E["I2C2 & UART3<br/>Resource Config"]
  F["Nightly Build<br/>Workflow"] --> G["maintenance-9.x<br/>Branch Support"]
  H["RADIOLINKF722<br/>Target"] --> I["M25P16 Flash<br/>Support"]

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File Walkthrough

	Relevant files
New target	target.h VANTAC RF007 board hardware configuration                                src/main/target/VANTAC_RF007/target.h Defines STM32F722XE board configuration with identifier "F7B5" Configures ICM42605/ICM42688P IMU on SPI1 with CW90 degree alignment Sets up I2C1 for barometer (SPL06) and I2C2 for external sensors with UART3 sharing Defines 6 UART ports with FrSky FBUS receiver on UART5 Configures SPI2 for W25N01G blackbox flash storage Enables DSHOT and DSHOT_DMAR for ESC communication +151/-0  target.c Timer hardware and servo output mapping                                    src/main/target/VANTAC_RF007/target.c Defines 9 timer hardware outputs across TIM1, TIM2, TIM3, and TIM4 Maps servo outputs to pins labeled S1-S3, TAIL, ESC, RPM, TLM, AUX, SBUS Uses TIM_USE_OUTPUT_AUTO for flexible pin assignment Includes detailed comments on pin label conflicts with UART and I2C +43/-0    config.c Default motor timer configuration                                                src/main/target/VANTAC_RF007/config.c Implements targetConfiguration function for default motor setup Sets TIM1 as motor output by default for sane defaults Enables support for 1 or 4 motor configurations +32/-0    CMakeLists.txt CMake build configuration                                                                src/main/target/VANTAC_RF007/CMakeLists.txt Adds CMake build configuration for VANTAC_RF007 target Specifies STM32F722XE microcontroller variant +1/-0
Documentation	README.md Target documentation and pin configuration guide                  src/main/target/VANTAC_RF007/README.md Documents FrSky/Rotorflight VANTAC RF007 flight controller features Provides pin configuration table showing servo/UART/I2C pin assignments Includes hardware layout with STM32 pin mappings Notes port C data pin swap and receiver bind procedure References Rotorflight documentation and manufacturer manual +73/-0
Configuration changes	nightly-build.yml Add maintenance-9.x to nightly builds                                        .github/workflows/nightly-build.yml Adds maintenance-9.x branch to nightly build trigger Enables automatic pre-release builds for RC releases on maintenance branch Maintains existing master and maintenance-8.x.x branch triggers +2/-1
Enhancement	target.h Add M25P16 flash memory support                                                    src/main/target/RADIOLINKF722/target.h Adds M25P16 flash memory support alongside existing W25N01G Defines M25P16_SPI_BUS and M25P16_CS_PIN on SPI3 Enables USE_FLASH_M25P16 configuration option Provides alternative flash storage option for the target +4/-0

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[qodo-code-review]

PR Compliance Guide 🔍

All compliance sections have been disabled in the configurations.

[qodo-code-review]

Suggestion: Resolve a resource conflict by disabling one of the two flash chip drivers (USE_FLASH_M25P16 or USE_FLASH_W25N01G), as both are configured to use the same SPI bus and chip select pin. [possible issue, importance: 9]

Suggested change

	#define W25N01G_SPI_BUS BUS_SPI3
	#define W25N01G_CS_PIN PD2
	#define M25P16_SPI_BUS BUS_SPI3
	#define M25P16_CS_PIN PD2
	#define USE_BLACKBOX
	#define USE_FLASHFS
	#define USE_FLASH_M25P16
	#define USE_FLASH_W25N01G
	#define W25N01G_SPI_BUS BUS_SPI3
	#define W25N01G_CS_PIN PD2
	#define M25P16_SPI_BUS BUS_SPI3
	#define M25P16_CS_PIN PD2 // Or a different, unused pin
	#define USE_BLACKBOX
	#define USE_FLASHFS
	// #define USE_FLASH_M25P16 // Disable one flash type to resolve conflict
	#define USE_FLASH_W25N01G

[qodo-code-review]

Suggestion: Resolve a pin conflict on PB6 and PB7 by disabling USE_UART1 by default, as these pins are also configured for timer outputs in target.c. [possible issue, importance: 7]

Suggested change

	#define USE_UART1 // clashes with I2C1
	#define UART1_TX_PIN PB6
	#define UART1_RX_PIN PB7 // pin labelled "SBUS"
	//#define USE_UART1 // clashes with I2C1 and PWM outputs on PB6/PB7
	#define UART1_TX_PIN PB6
	#define UART1_RX_PIN PB7 // pin labelled "SBUS"

[qodo-code-review]

Suggestion: timer2id() can return (uint8_t)-1 when TIM1 is not found; guard the returned id (and resulting pointer) before dereferencing to prevent out-of-bounds/NULL access and apply a safe fallback. [Learned best practice, importance: 6]

Suggested change

	void targetConfiguration(void)
	{
	// default "ESC" pin to be a motor
	timerOverridesMutable(timer2id(TIM1))->outputMode = OUTPUT_MODE_MOTORS;
	}
	void targetConfiguration(void)
	{
	// default "ESC" pin to be a motor
	const uint8_t timId = timer2id(TIM1);
	if (timId == (uint8_t)-1) {
	return;
	}
	timerOverride_t *override = timerOverridesMutable(timId);
	if (!override) {
	return;
	}
	override->outputMode = OUTPUT_MODE_MOTORS;
	}