Merge pull request #1829 from seijikun/mr-pci-enumerate2

uefi: Fix broken bridge recursion in PCI enumeration

Author: phip1611

uefi/src/proto/pci/enumeration.rs

@@ -37,10 +37,10 @@ struct PciRegister3 {
 #[allow(unused)]
 #[derive(Clone, Copy, Debug)]
 struct PciHeader1Register6 {
-    secondary_latency_timer: u8,
-    subordinate_bus: u8,
-    secondary_bus: u8,
     primary_bus: u8,
+    secondary_bus: u8,
+    subordinate_bus: u8,
+    secondary_latency_timer: u8,
 }
 
 /// Read the 4byte pci register with the given `addr` and cast it into the given structured representation.
@@ -93,7 +93,8 @@ fn visit_function(
     }
     queue.insert(FullPciIoAddress::new(proto.segment_nr(), addr));
     let (base_class, sub_class) = get_classes(proto, addr)?;
-    if base_class == 0x6 && sub_class == 0x4 && get_header_type(proto, addr)? == 0x01 {
+    let header_type = get_header_type(proto, addr)? & 0b01111111;
+    if base_class == 0x6 && sub_class == 0x4 && header_type == 0x01 {
         // This is a PCI-to-PCI bridge controller. The current `addr` is the address with which it's
         // mounted in the PCI tree we are currently traversing. Now we query its header, where
         // the bridge tells us a range of addresses [secondary;subordinate], with which the other

uefi/src/proto/pci/root_bridge.rs

@@ -101,17 +101,18 @@ impl PciRootBridgeIo {
         use crate::proto::pci::enumeration;
 
         let mut devices = BTreeSet::new();
-        for descriptor in self.configuration()? {
-            // In the descriptors we can query for the current root bridge, Bus entries contain ranges of valid
-            // bus addresses. These are starting points for the recursive scanning process performed in
-            // enumeration::enum_bus
-            if descriptor.resource_range_type == ResourceRangeType::Bus {
-                for bus in (descriptor.address_min as u8)..=(descriptor.address_max as u8) {
-                    let addr = PciIoAddress::new(bus, 0, 0);
-                    enumeration::visit_bus(self, addr, &mut devices)?;
-                }
-            }
+        // In the descriptors, the entry with range_type bus specifies the bus numbers that were
+        // allocated to devices below this root bridge. The first bus number in this range is
+        // the starting point. All subsequent numbers are reached via PCI bridge recursion during enumeration.
+        if let Some(descriptor) = self
+            .configuration()?
+            .iter()
+            .find(|d| d.resource_range_type == ResourceRangeType::Bus)
+        {
+            let addr = PciIoAddress::new(descriptor.address_min as u8, 0, 0);
+            enumeration::visit_bus(self, addr, &mut devices)?;
         }
+
         Ok(devices)
     }
 }